Optimizing Silicon Oxide Embedded Silicon Nanocrystal Inter-particle Distances

Correlation between matrix structural order and compressive stress exerted on silicon nanocrystals embedded in silicon-rich silicon oxide

Silicon nanocrystals embedded in a silicon oxide matrix were deposited by radio frequency reactive magnetron sputtering. By means of Raman spectroscopy, we have found that a compressive stress is exerted on the silicon nanocrystal cores. The stress varies as a function of silicon concentration in the silicon-rich silicon oxide layers varies, which can be attributed to changes of nanocrystal env...

Improvement of a Nano-scale Silicon on Insulator Field Effect Transistor Performance using Electrode, Doping and Buried Oxide Engineering

In this work, a novel Silicon on Insulator (SOI) MOSFET is proposed and investigated. The drain and source electrode structures are optimized to enhance ON-current while global device temperature and hot carrier injection are decreased. In addition, to create an effective heat passage from channel to outside of the device, a silicon region has embedded in the buried oxide. In order to reduce th...

Potentiostatic formation of porous silicon in dilute HF: Evidence that nanocrystal size is not restricted by quantum confinement

The role that applied potential has in controlling the properties of porous silicon formed on highly conductive p-type silicon in diluted HF as been investigated by studying the photoluminescence characteristics along the current–voltage curve and using high resolution transmission lectron microscopy (HRTEM) evidence to support the conclusions drawn. A dramatic decrease in the average nanocryst...

Optimizing non-radiative energy transfer in hybrid colloidal-nanocrystal/silicon structures by controlled nanopillar architectures for future photovoltaic cells

A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement

Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devic...